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IEEE Transactions on Emerging Topics in Computing Special Issue/Section on Reliability-aware Design and Analysis Methods for Digital Systems: from Gate to System Level DEADLINE EXTENDED TO MARCH 16th, 2017 |
CALL FOR PAPERS
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Scope |
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The continuous scaling of CMOS devices as well as the increased interest in the use of emerging technologies make more and more important the topics related to defect and fault tolerance in digital systems. To address the increasing complexity of digital systems and their challenging reliability requirements, it is imperative to employ design and analysis methods to different levels of the abstraction, starting from the system level down to the gate level. The IEEE Transaction on Emerging Topics in Computing (TETC) seeks original manuscripts for a Special Section on Reliability-aware Design and Analysis Methods for Digital Systems: from Gate to System Level scheduled to appear in the March issue of 2018. All aspects of design, manufacturing, test and analysis of systems affected by defects during manufacturing and by faults during system operation are of interest. The topics of interest for this special issue include, but are not limited to:
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TSubmitted articles must not have been previously published or currently submitted for journal publication elsewhere. An extended version of an article appearing in the conference proceedings (and in particular, IEEE DFT 2016) can be submitted provided that it has substantially new content w.r.t. to the original conference version. The conference paper must be cited in the main text and the cover letter must clearly describe the differences with the conference version and clearly identify the new contributions. As an author, you are responsible for understanding and adhering to the submission guidelines. You can access them at the IEEE Computer Society web site, www.computer.org. Please thoroughly read these before submitting your manuscript. Please submit your paper to Manuscript Central at https://mc.manuscriptcentral.com/tetc-cs. |
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Guest editors | |
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The special issue is supported by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC). |
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IEEE Computer Society- Test
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